FPGA Electrical Design Engineer
$401K/yr – $401K/yr
You'll complete your application on the employer's website.
$401K/yr – $401K/yr
You'll complete your application on the employer's website.
Job type
Salary
$401K/yr – $401K/yr
Posted
25 days ago
Averro is a veteran-owned staffing and solutions firm connecting talent with cutting-edge companies. The FPGA/ASIC Electrical Design Engineer will design and verify digital, mixed-signal ASICs, and FPGAs, develop comprehensive verification methodologies, and support timing analysis, lab integration, troubleshooting, and system validation. The role also involves collaborating with cross-functional teams to resolve design and implementation challenges.
Responsibilities
Design and develop digital ASICs, FPGAs, and mixed-signal ASICs using HDL (VHDL, Verilog, SystemVerilog)
Develop and execute verification methodologies, test benches, test plans, and coverage models for comprehensive validation
Perform timing, noise, and signoff analysis; support lab integration, troubleshooting, and system validation
Collaborate with cross-functional teams and resolve design challenges related to timing, congestion, and implementation
Preferred
Advanced degree (MS/PhD) in Electrical Engineering or Computer Engineering
Full ASIC/FPGA lifecycle expertise including Software-Defined Radio, ADC/DAC, and DSP architectures
Experience with physical design flows, RTL2GDSII signoff, and DFT/Scan/MBIST methodologies
Advanced Degree
ASIC/FPGA Lifecycle Expertise
Software-Defined Radio
ADC/DAC
DSP Architectures
Physical Design Flows
RTL-to-GDSII Signoff
DFT Methodologies
Scan Methodologies
MBIST Methodologies
Benefits
Medical insurance
Dental insurance
Vision insurance
401k
Sick leave
Employee assistance program
Depending on your package selection, Averro offers PTO, paid holidays, and legal insurance.
Remote work
Company
Staffing and solutions firm for technology, aerospace, and nuclear industries
Bellevue, WA , US
https://www.averro.com/
Founded in 2010
501-1000 employees
Qualifications
Must have both ASOC and FPGA design with HDL fluency and hands-on verification and testbench experience
7+ years of ASIC design and implementation experience with proven expertise in FPGA and digital/mixed-signal design
Bachelor's degree in Electrical Engineering, Computer Engineering, or related discipline
Proficiency in HDL (VHDL, Verilog, SystemVerilog) and Linux development environments
Strong experience with design verification, test bench development, and familiarity with industry-standard EDA tools
Advanced degree (MS/PhD) in Electrical Engineering or Computer Engineering
Full ASIC/FPGA lifecycle expertise including Software-Defined Radio, ADC/DAC, and DSP architectures
Experience with physical design flows, RTL2GDSII signoff, and DFT/Scan/MBIST methodologies
Required skills
ASIC Design and Implementation, FPGA Design, Mixed-Signal Design, VHDL, Verilog, SystemVerilog, Linux, Design Verification, Testbench Development, DSP Architectures, RTL2GDSII Signoff, DFT/Scan/MBIST
Experience
7+ years
Interested in this role?
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