ASIC Design Engineer

Brookhaven National Laboratory develops advanced scientific instrumentation and microelectronics for research programs in high-energy physics, nuclear physics, photon sciences, and related fields. The Digital ASIC Design Engineer will architect, design, implement, and integrate digital blocks and subsystems for mixed-signal ASICs used in detector readout, triggering, timing, data transmission, and scientific instrumentation, while collaborating with multidisciplinary engineering and scientific teams.

Responsibilities

• Take a proactive role in the architecture, microarchitecture, RTL design, and integration of digital ASICs and digital subsystems for scientific instruments, including EIC detector readout and related programs
• Develop design specifications based on detector, data acquisition, timing, power, radiation, and system integration requirements in conjunction with scientists, engineers, and project stakeholders
• Design and implement synthesizable RTL in SystemVerilog/Verilog for blocks such as data formatting, sparsification, buffering, trigger and timing interfaces, configuration and control, calibration logic, digital signal processing, and high-speed link interfaces
• Develop and maintain reusable digital IP, register maps, bus interfaces, clock and reset architectures, memory interfaces, finite-state machines, FIFOs, error detection/correction logic, and monitoring features suitable for ASIC integration
• Carry out or contribute to synthesis, static timing analysis, clock-domain crossing analysis, reset-domain crossing analysis, power estimation, linting, design-for-test insertion, and timing-driven physical implementation in Cadence, Synopsys, Siemens, or similar CAD/EDA environments
• Work closely with physical design and analog/mixed-signal teams to ensure successful floorplanning, partitioning, timing closure, power integrity, signal integrity, and mixed-signal integration
• Coordinate with verification engineers to define verification plans, develop self-checking test benches, review functional coverage, debug simulations, and close design issues before tapeout
• Support FPGA prototyping, laboratory evaluation, test-board development, bring-up, characterization, and integration of ASICs with sensors, firmware, and data acquisition systems
• Create technical documentation, design reviews, interface control documents, and contributions to new project initiatives and proposals making use of emerging microelectronics technologies
• Demonstrated commitment to working safely, acting ethically, and taking personal accountability for operational excellence

Preferred

• Minimum three (3) years progressively responsible related work experience in digital ASIC design
• Experience in a research environment (particularly in academic, or national laboratory or semiconductor industry)
• Master's or Ph.D. in electrical engineering, computer engineering, applied physics, or a closely related field of study
• Experience with readout integrated circuits for radiation detectors, including detector timing, triggering, sparsified data readout, high-speed data transmission, calibration, and slow-control functions
• Experience with ASICs for particle physics, nuclear physics, photon sciences, cryogenic instrumentation, space or radiation environments, or other scientific applications
• Experience with digital implementation tools and flows such as synthesis, static timing analysis, formal equivalence checking, lint, CDC/RDC analysis, power analysis, DFT/scan, and automated place and route
• Familiarity with common on-chip bus and control interfaces such as AXI, AHB, APB, Wishbone, I2C, SPI, JTAG, and custom detector-readout protocols
• Experience with scripting and automation using Tcl, Python, Perl, Make, shell scripting, or similar tools in an EDA environment
• Knowledge of radiation-tolerant design techniques, single-event-effect mitigation, triple modular redundancy, error detection/correction, and design approaches for low-power or cryogenic operation
• Experience working with firmware, FPGA prototyping, board-level test systems, and laboratory characterization of ASICs
• Digital ASIC Design
• Research Environment Experience
• Radiation Detector Readout Circuits
• Detector Timing
• Triggering
• Sparsified Data Readout
• High-Speed Data Transmission
• Calibration
• Slow-Control Functions
• Particle Physics ASICs
• Nuclear Physics ASICs
• Photon Sciences ASICs
• Cryogenic Instrumentation
• Radiation Applications
• Scientific ASIC Applications
• Digital Implementation Flows
• Static Timing Analysis
• Formal Equivalence Checking
• Lint
• CDC/RDC Analysis
• Power Analysis
• DFT/Scan
• Automated Place
• Route
• AXI
• AHB
• APB
• Wishbone
• I2C
• SPI
• JTAG
• Detector-Readout Protocols
• Tcl
• Python
• Perl
• Make
• Shell Scripting
• EDA Automation
• Radiation-Tolerant Design
• Single-Event-Effect Mitigation
• Triple Modular Redundancy
• Error Detection
• Correction
• Cryogenic Operation Design
• Firmware
• FPGA Prototyping
• Board-Level Test Systems
• ASIC Laboratory Characterization

Benefits

• Fully onsite position located at Brookhaven National Laboratory in Upton, NY.

Company

• Multidisciplinary national laboratory for science and technology research
• Upton, New York, USA
• http://www.bnl.gov/
• Founded in 1947
• 1001-5000 employees

Qualifications

• Bachelor's degree in electrical engineering, computer engineering, applied physics, or a closely related field of study
• Some experience with developing synthesizable RTL in SystemVerilog and/or Verilog for complex ASICs or system-on-chip designs
• Familiarity with ASIC design processes and flows, CAD/EDA tools for ASIC design, and their interoperability across design, verification, synthesis, timing, and physical implementation
• Familiarity with digital architecture, clocking and reset strategies, timing constraints, CDC/RDC methodology, low-power design considerations, and debugging of large digital systems
• Ability to work effectively with group members in a multi-user, process-design-kit-managed, version-controlled design environment and to step up to technical and schedule challenges
• Excellent written and oral communication skills, including the ability to document designs, participate in reviews, and work with multidisciplinary scientific and engineering teams
• Minimum three (3) years progressively responsible related work experience in digital ASIC design
• Experience in a research environment (particularly in academic, or national laboratory or semiconductor industry)
• Master's or Ph.D. in electrical engineering, computer engineering, applied physics, or a closely related field of study
• Experience with readout integrated circuits for radiation detectors, including detector timing, triggering, sparsified data readout, high-speed data transmission, calibration, and slow-control functions
• Experience with ASICs for particle physics, nuclear physics, photon sciences, cryogenic instrumentation, space or radiation environments, or other scientific applications
• Experience with digital implementation tools and flows such as synthesis, static timing analysis, formal equivalence checking, lint, CDC/RDC analysis, power analysis, DFT/scan, and automated place and route
• Familiarity with common on-chip bus and control interfaces such as AXI, AHB, APB, Wishbone, I2C, SPI, JTAG, and custom detector-readout protocols
• Experience with scripting and automation using Tcl, Python, Perl, Make, shell scripting, or similar tools in an EDA environment
• Knowledge of radiation-tolerant design techniques, single-event-effect mitigation, triple modular redundancy, error detection/correction, and design approaches for low-power or cryogenic operation
• Experience working with firmware, FPGA prototyping, board-level test systems, and laboratory characterization of ASICs

Required skills

• Digital ASIC Design, SystemVerilog, Verilog, ASIC Design Flows, Clock and Reset Architecture, Clock-Domain and Reset-Domain Crossing Analysis, Low-Power Design, Static Timing Analysis, Radiation-Tolerant Design, Readout Integrated Circuits, FPGA Prototyping, Python

Preferred skills

• Written and Oral Communication, Multidisciplinary Collaboration

Experience

• 3+ years