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Full-time

ASIC & FPGA Design Engineer - E2

$91K/yr – $169K/yr

Aerospace, defense, and security contractorIT & TechnologyPosted 20d ago

You'll complete your application on the employer's website.

Role overview

Job type

Full-time

Salary

$91K/yr – $169K/yr

Posted

20 days ago

Job description

Lockheed Martin Space is hiring an ASIC & FPGA Design Engineer to develop microchips for space applications. The role covers ASIC and FPGA development across the lifecycle, including requirements capture, architecture, design, analysis, simulation, testing, technical reviews, and coordination with an independent verification team.

Responsibilities

Work with low SWaP, radiation hardened, space rated devices

Perform all aspects of ASIC and FPGA development through the lifecycle from initial requirements capture through architecture, design, analysis, simulations and test in a Linux-based high-performance computing environment

Support technical reviews and present to internal and external stakeholders

Interface with an independent verification team who will be working in parallel, verifying the design

Develops, designs, verifies, and documents Application-Specific Integrated Circuits (ASIC) and Field Programmable Gate Arrays (FPGA) development

Determines architecture design, logic design, and system simulation

Assignments include the analysis of all aspects from high-level design to synthesis, place and route, and timing and power utilization

Typically uses specialized equipment to establish operation data, conduct experimental tests, and evaluate results

Preferred

Masters Degree

Experience in ASIC / FPGA life cycle (architecture, design, simulation, verification, validation, integration & test)

FPGA/ASIC verification experience is a plus

Experience with electronics design

Experience in lab integration, and troubleshooting activities

Knowledge of space-grade/qualified FPGAs and ASICs and toolsets including AMD/Xilinx Vivado or Microchip Libero

Experience or knowledge of MS Project, JIRA

Experience with MS Project, JIRA or equivalent a plus

Experience with Earned Value Management System (EVMS)

Experience mentoring junior engineers

Proficient in AI prompting as it applies to this position and practice

Master's Degree

ASIC/FPGA Lifecycle

System Architecture

Electronics Design

Simulation

Validation

Integration

Testing

Lab Integration

Space-Qualified FPGAs

Space-Qualified ASICs

AMD/Xilinx Vivado

Microchip Libero

MS Project

JIRA

Earned Value Management

AI Prompting

Mentoring

Benefits

Medical

Dental

Vision

Flexible work arrangements and schedules (e.g., 4x10)

401(k) match

Paid time off

Holidays

Parental Leave

EAP

Flexible Spending Accounts

Education Assistance

Life Insurance

Short-Term Disability

Long-Term Disability

Annual short-term and/or long-term incentive compensation programs may be offered depending on the position. Payments under these annual programs are not guaranteed and can vary from year to year and are tied to a range of performance metrics.

Company

Aerospace, defense, and security contractor

Bethesda, Maryland, USA

https://www.lockheedmartin.com/

Founded in 1912

10001+ employees

Qualifications

You need to be an independently minded and well organized engineer, comfortable in laboratory digital environments, and able to respond and interact with a dynamic fast-moving team

5+ years professional FPGA development experience

While no clearance is needed to start in this position, you will need to obtain and maintain a DoD Secret clearance, thus US Citizenship is required

Bachelor of Science or higher from an accredited college in Electrical Engineering or related discipline, or equivalent experience/combined education

Must have 1+ years professional FPGA development experience

HDL programming knowledge or experience with VHDL, Verilog, and/or SystemVerilog

Willing and able to obtain and maintain a DoD Secret clearance, thus US Citizenship is required for this position

Masters Degree

Experience in ASIC / FPGA life cycle (architecture, design, simulation, verification, validation, integration & test)

FPGA/ASIC verification experience is a plus

Experience with electronics design

Experience in lab integration, and troubleshooting activities

Knowledge of space-grade/qualified FPGAs and ASICs and toolsets including AMD/Xilinx Vivado or Microchip Libero

Experience or knowledge of MS Project, JIRA

Experience with MS Project, JIRA or equivalent a plus

Experience with Earned Value Management System (EVMS)

Experience mentoring junior engineers

Proficient in AI prompting as it applies to this position and practice

5+ years professional FPGA development experience.

Must have 1+ years professional FPGA development experience.

Required skills

FPGA Development, ASIC Design, VHDL, Verilog, SystemVerilog, FPGA/ASIC Lifecycle Development, FPGA/ASIC Verification, Electronics Design, FPGA/ASIC Integration and Testing, AMD/Xilinx Vivado, Microchip Libero, Space-Grade FPGAs and ASICs, Earned Value Management System (EVMS), JIRA, MS Project

Preferred skills

Masters Degree, FPGA/ASIC verification experience is a plus, Experience with electronics design, Experience or knowledge of MS Project, JIRA, Experience with MS Project, JIRA or equivalent a plus, Experience with Earned Value Management System (EVMS), Experience mentoring junior engineers

Experience

1+ years

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