Experienced Hardware Design Engineer

Hudson River Trading (HRT) is a leading firm in algorithmic trading that focuses on creating high performance compute engines. They are seeking an Experienced Hardware Design Engineer to architect and design complex systems, collaborating with a global team to develop custom FPGA and ASIC solutions for trading applications.

Responsibilities

• Collaborate with a cross-functional team to develop and deploy custom FPGA and/or ASIC solutions for a wide range of trading applications
• Investigate new technologies and tools
• Contribute to a nimble hardware development tech stack

Benefits

• Discretionary performance-based bonuses
• A competitive benefits package which includes medical, dental, vision, basic life insurance, and enrollment in our company’s retirement savings plans
• Employees will receive sick and parental leave, as well as other paid time off (including 20 vacation days and 10 paid holidays in the US)
• Benefits and time off policies will vary across non-US locations

Company

• Multi-asset class quantitative trading firm.
• New York, New York, USA
• https://www.hudsonrivertrading.com/
• Founded in 2002
• 1001-5000 employees

Qualifications

• Ability to describe hardware designs at a high level, low level, or anywhere in between
• Brilliant design, optimization, debugging and problem solving skills
• Professional experience (2+ years) in RTL design for FPGA or ASIC
• Expert SystemVerilog development skills with a thorough understanding of the language
• Expert on low level FPGA or ASIC architectures, with a deep understanding of what makes them 'tick'
• Skilled in network communications, processing pipelines, and/or machine learning
• Working knowledge of Python and/or C++
• Comfortable in a Linux environment
• Strong verification experience
• Familiarity with AMD Vivado is a plus
• A bachelor's degree in computer science, electrical engineering, or a related field

Required skills

• SystemVerilog, RTL design for FPGA or ASIC, FPGA architectures, ASIC architectures, Network communications, Processing pipelines, Machine learning accelerators, Python, C++, Linux environment, Hardware verification, AMD Vivado

Experience

• 2+ years