ASIC Power Engineer
Competitive
Creospan is seeking an ASIC Power Engineer / Physical Design Engineer to perform power analysis and optimization for next-generation AR/VR silicon products. The role focuses on power-analysis flows, identifying and optimizing power bottlenecks, automating analysis, supporting PPA optimization, and implementing RTL/UPF blocks. Responsibilities Set up, maintain, and debug RTL- and gate-level power analysis flows using

